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_aEmbedded Computer Systems: Architectures, Modeling, and Simulation _h[electronic resource] : _b9th International Workshop, SAMOS 2009, Samos, Greece, July 20-23, 2009, Proceedings / _cedited by Koen Bertels, Nikitas Dimopoulos, Cristina Silvano, Stephan Wong. |
250 | _a1st ed. 2009. | ||
264 | 1 |
_aBerlin, Heidelberg : _bSpringer Berlin Heidelberg : _bImprint: Springer, _c2009. |
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300 |
_aXIV, 342 p. _bonline resource. |
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336 |
_atext _btxt _2rdacontent |
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490 | 1 |
_aTheoretical Computer Science and General Issues, _x2512-2029 ; _v5657 |
|
505 | 0 | _aBeachnote -- What Else Is Broken? Can We Fix It? -- Architectures for Multimedia -- Programmable and Scalable Architecture for Graphics Processing Units -- The Abstract Streaming Machine: Compile-Time Performance Modelling of Stream Programs on Heterogeneous Multiprocessors -- CABAC Accelerator Architectures for Video Compression in Future Multimedia: A Survey -- Programmable Accelerators for Reconfigurable Video Decoder -- Scenario Based Mapping of Dynamic Applications on MPSoC: A 3D Graphics Case Study -- Multiple Description Scalable Coding for Video Transmission over Unreliable Networks -- Multi/Many Cores Architectures -- Evaluation of Different Multithreaded and Multicore Processor Configurations for SoPC -- Implementing Fine/Medium Grained TLP Support in a Many-Core Architecture -- Implementation of W-CDMA Cell Search on a FPGA Based Multi-Processor System-on-Chip with Power Management -- A Multiprocessor Architecture with an Omega Network for the Massively Parallel Model GCA -- VLSI Architectures Design -- Towards Automated FSMD Partitioning for Low Power Using Simulated Annealing -- Radix-4 Recoded Multiplier on Quantum-Dot Cellular Automata -- Prediction in Dynamic SDRAM Controller Policies -- Inversion/Non-inversion Implementation for an 11,424 Gate-Count Dynamic Optically Reconfigurable Gate Array VLSI -- Architecture Modeling and Exploration Tools -- Visualization of Computer Architecture Simulation Data for System-Level Design Space Exploration -- Modeling Scalable SIMD DSPs in LISA -- NoGAP: A Micro Architecture Construction Framework -- A Comparison of NoTA and GENESYS -- Special Session 1: Instruction-Set Customization -- to Instruction-Set Customization -- Constraint-Driven Identification of Application Specific Instructions in the DURASE System -- A Generic Design Flow for Application Specific Processor Customization through Instruction-Set Extensions (ISEs) -- Runtime Adaptive Extensible Embedded Processors - A Survey -- Special Session 2: The Future of Reconfigurable Computing and Processor Architectures -- to the Future of Reconfigurable Computing and Processor Architectures -- An Embrace-and-Extend Approach to Managing the Complexity of Future Heterogeneous Systems -- Applying the Stream-Based Computing Model to Design Hardware Accelerators: A Case Study -- Reconfigurable Multicore Server Processors for Low Power Operation -- Reconfigurable Computing in the New Age of Parallelism -- Reconfigurable Multithreading Architectures: A Survey -- Special Session 3: Mastering Cell BE and GPU Execution Platforms -- to Mastering Cell BE and GPU Execution Platforms -- Efficient Mapping of Multiresolution Image Filtering Algorithms on Graphics Processors -- Implementing Blocked Sparse Matrix-Vector Multiplication on NVIDIA GPUs -- Experiences with Cell-BE and GPU for Tomography -- Realizing FIFO Communication When Mapping Kahn Process Networks onto the Cell -- Exploiting Locality on the Cell/B.E. through Bypassing -- Exploiting the Cell/BE Architecture with the StarPU Unified Runtime System. | |
520 | _aThis book constitutes the refereed proceedings of the 9th International Workshop on Architectures, Modeling, and Simulation, SAMOS 2009, held on Samos, Greece, on July 20-23, 2009. The 18 regular papers presented were carefully reviewed and selected from 52 submissions. The papers are organized in topical sections on architectures for multimedia, multi/many cores architectures, VLSI architectures design, architecture modeling and exploration tools. In addition there are 14 papers from three special sessions which were organized on topics of current interest: instruction-set customization, reconfigurable computing and processor architectures, and mastering cell BE and GPU execution platforms. | ||
650 | 0 |
_aComputer systems. _9173066 |
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650 | 0 |
_aComputers. _98172 |
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650 | 0 |
_aMicroprocessors. _9173067 |
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650 | 0 |
_aComputer architecture. _93513 |
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650 | 0 |
_aComputer networks . _931572 |
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650 | 0 |
_aElectronic digital computers _xEvaluation. _921495 |
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650 | 1 | 4 |
_aComputer System Implementation. _938514 |
650 | 2 | 4 |
_aComputer Hardware. _933420 |
650 | 2 | 4 |
_aProcessor Architectures. _9173068 |
650 | 2 | 4 |
_aComputer Communication Networks. _9173069 |
650 | 2 | 4 |
_aSystem Performance and Evaluation. _932047 |
700 | 1 |
_aBertels, Koen. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt _9173070 |
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700 | 1 |
_aDimopoulos, Nikitas. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt _9173071 |
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700 | 1 |
_aSilvano, Cristina. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt _9173072 |
|
700 | 1 |
_aWong, Stephan. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt _9173073 |
|
710 | 2 |
_aSpringerLink (Online service) _9173074 |
|
773 | 0 | _tSpringer Nature eBook | |
776 | 0 | 8 |
_iPrinted edition: _z9783642031373 |
776 | 0 | 8 |
_iPrinted edition: _z9783642031397 |
830 | 0 |
_aTheoretical Computer Science and General Issues, _x2512-2029 ; _v5657 _9173075 |
|
856 | 4 | 0 | _uhttps://doi.org/10.1007/978-3-642-03138-0 |
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