000 | 03625nam a22005295i 4500 | ||
---|---|---|---|
001 | 978-3-031-62874-0 | ||
003 | DE-He213 | ||
005 | 20240730172453.0 | ||
007 | cr nn 008mamaa | ||
008 | 240621s2024 sz | s |||| 0|eng d | ||
020 |
_a9783031628740 _9978-3-031-62874-0 |
||
024 | 7 |
_a10.1007/978-3-031-62874-0 _2doi |
|
050 | 4 | _aTK5102.9 | |
072 | 7 |
_aTJF _2bicssc |
|
072 | 7 |
_aUYS _2bicssc |
|
072 | 7 |
_aTEC067000 _2bisacsh |
|
072 | 7 |
_aTJF _2thema |
|
072 | 7 |
_aUYS _2thema |
|
082 | 0 | 4 |
_a621.382 _223 |
245 | 1 | 0 |
_aDesign and Architectures for Signal and Image Processing _h[electronic resource] : _b17th International Workshop, DASIP 2024, Munich, Germany, January 17-19, 2024, Proceedings / _cedited by Tiago Dias, Paola Busia. |
250 | _a1st ed. 2024. | ||
264 | 1 |
_aCham : _bSpringer Nature Switzerland : _bImprint: Springer, _c2024. |
|
300 |
_aXVI, 123 p. 48 illus., 39 illus. in color. _bonline resource. |
||
336 |
_atext _btxt _2rdacontent |
||
337 |
_acomputer _bc _2rdamedia |
||
338 |
_aonline resource _bcr _2rdacarrier |
||
347 |
_atext file _bPDF _2rda |
||
490 | 1 |
_aLecture Notes in Computer Science, _x1611-3349 ; _v14622 |
|
505 | 0 | _a -- Specialized Hardware Architectures for Signal and Image Processing. -- A Highly Configurable Platform for Advanced PPG Analysis. -- sEMG-based Gesture Recognition with Spiking Neural Networks on Low-power FPGA. -- Scalable FPGA Implementation of Dynamic Programming for Optimal Control of Hybrid Electrical Vehicles. -- Optimization Approaches for Efficient Deployment of Signal and Image Processing Applications. -- Wordlength Optimization for Custom Floating-point Systems. -- An Initial Framework for Prototyping Radio-Interferometric Imaging Pipelines. -- Scratchy: A Class of Adaptable Architectures with Software-Managed Communication For Edge Streaming Applications. -- Digital Signal Processing Design for Reconfigurable Systems. -- Standalone Nested Loop Acceleration on CGRAs for Signal Processing Applications. -- Improving the Energy Efficiency of CNN Inference on FPGA using Partial Reconfiguration. -- Optimising Graph Representation for Hardware Implementation of Graph Convolutional Networks for Event-based Vision. | |
520 | _aThis book constitutes the refereed proceedings of the 17th International Workshop on Design and Architecture for Signal and Image Processing, DASIP 2024, held in Munich, Germany, during January 17-19, 2024. The 9 full papers presented in this book were carefully reviewed and selected from 21 submissions. The workshop provided an inspiring international forum for the latest innovations and developments in the fields of leading signal, image, and video processing and machine learning in custom embedded, edge, and cloud computing architectures and systems. | ||
650 | 0 |
_aSignal processing. _94052 |
|
650 | 1 | 4 |
_aSignal, Speech and Image Processing. _931566 |
700 | 1 |
_aDias, Tiago. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt _9103937 |
|
700 | 1 |
_aBusia, Paola. _eeditor. _4edt _4http://id.loc.gov/vocabulary/relators/edt _9103938 |
|
710 | 2 |
_aSpringerLink (Online service) _9103940 |
|
773 | 0 | _tSpringer Nature eBook | |
776 | 0 | 8 |
_iPrinted edition: _z9783031628733 |
776 | 0 | 8 |
_iPrinted edition: _z9783031628757 |
830 | 0 |
_aLecture Notes in Computer Science, _x1611-3349 ; _v14622 _923263 |
|
856 | 4 | 0 | _uhttps://doi.org/10.1007/978-3-031-62874-0 |
912 | _aZDB-2-SCS | ||
912 | _aZDB-2-SXCS | ||
912 | _aZDB-2-LNC | ||
942 | _cEBK | ||
999 |
_c88333 _d88333 |