000 | 05348nam a2201033 i 4500 | ||
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001 | 5264189 | ||
003 | IEEE | ||
005 | 20200421114114.0 | ||
006 | m o d | ||
007 | cr |n||||||||| | ||
008 | 151221s2002 njua ob 001 eng d | ||
020 |
_a9780470546406 _qelectronic |
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020 |
_z9780780310001 _qprint |
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020 |
_z0470546409 _qelectronic |
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024 | 7 |
_a10.1109/9780470546406 _2doi |
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035 | _a(CaBNVSL)mat05264189 | ||
035 | _a(IDAMS)0b000064810c409f | ||
040 |
_aCaBNVSL _beng _erda _cCaBNVSL _dCaBNVSL |
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050 | 4 |
_aTK7895.M4 _bS49 1997eb |
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082 | 0 | 4 |
_a621.39/732 _222 |
100 | 1 |
_aSharma, Ashok K., _eauthor. |
|
245 | 1 | 0 |
_aSemiconductor memories : _btechnology, testing, and reliability / _cAshok K. Sharma. |
264 | 1 |
_aPiscataway, New Jersey : _bIEEE Press, _cc1997. |
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264 | 2 |
_a[Piscataqay, New Jersey] : _bIEEE Xplore, _c[2002] |
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300 |
_a1 PDF (xii, 462 pages) : _billustrations. |
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336 |
_atext _2rdacontent |
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337 |
_aelectronic _2isbdmedia |
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338 |
_aonline resource _2rdacarrier |
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500 | _a"IEEE order number: PC3491"--P. [4] cover. | ||
500 | _a"IEEE Solid-State Circuits Council, sponsor." | ||
504 | _aIncludes bibliographical references and index. | ||
505 | 0 | _aPreface -- Chapter 1: Introduction -- Chapter 2: Random Access Memory Technologies -- 2.1 Introduction -- 2.2 Static Random Access Memories (SRAMs) -- 2.3 Dynamic Random Access Memories (DRAMs) -- Chapter 3: Nonvolatile Memories -- 3.1 Introduction -- 3.2 Masked Read-Only Memories (ROMs) -- 3.3 Programmable Read-Only Memories (PROMs) -- 3.4 Erasable (UV)-Programmable Read-Only Memories (EPROMs) -- 3.5 Electrically Erasable PROMs (EEPROMs) -- 3.6 Flash Memories (EPROMs or EEPROMs) -- Chapter 4: Memory Fault Modeling and Testing -- 4.1 Introduction . . . -- 4.2 RAM Fault Modeling -- 4.3 RAM Electrical Testing -- 4.4 RAM Pseudorandom Testing -- 4.5 Megabit DRAM Testing -- 4.6 Nonvolatile Memory Modeling and Testing -- 4.7 IDDQ Fault Modeling and Testing -- 4.8 Application Specific Memory Testing -- Chapter 5: Memory Design for Testability and Fault Tolerance -- 5.1 General Design for Testability Techniques -- 5.2 RAM Built-in Self-Test (BIST) -- 5.3 Embedded Memory DFT and BIST Techniques -- 5.4 Advanced BIST and Built-in Self-Repair Architectures -- 5.5 DFT and BIST for ROMs -- 5.6 Memory Error-Detection and Correction Techniques -- 5.7 Memory Fault-Tolerance Designs -- Chapter 6: Semiconductor Memory Reliability -- 6.1 General Reliability Issues -- 6.2 RAM Failure Modes and Mechanisms -- 6.3 Nonvolatile Memory Reliability -- 6.4 Reliability Modeling and Failure Rate Prediction -- 6.5 Design for Reliability -- 6.6 Reliability Test Structures -- 6.7 Reliability Screening and Qualification -- Chapter 7: Semiconductor Memory Radiation Effects -- 7.1 Introduction -- 7.2 Radiation Effects -- 7.3 Radiation-Hardening Techniques -- 7.4 Radiation Hardness Assurance and Testing -- Chapter 8: Advanced Memory Technologies -- 8.1 Introduction -- 8.2 Ferroelectric Random Access Memories (FRAMs) -- 8.3 Gallium Arsenide (GaAs) FRAMs -- 8.4 Analog Memories -- 8.5 Magnetoresistive Random Access Memories (MRAMs) -- 8.6 Experimental Memory Devices -- Chapter 9: High-Density Memory Packaging Technologies. | |
505 | 8 | _a9.1 Introduction -- 9.2 Memory Hybrids and MCMs (2-D) -- 9.3 Memory Stacks and MCMs (3-D) -- 9.4 Memory MCM Testing and Reliability Issues -- 9.5 Memory Cards -- 9.6 High-Density Memory Packaging Future Directions -- Index. | |
506 | 1 | _aRestricted to subscribers or individual electronic text purchasers. | |
530 | _aAlso available in print. | ||
538 | _aMode of access: World Wide Web | ||
588 | _aDescription based on PDF viewed 12/21/2015. | ||
650 | 0 | _aSemiconductor storage devices. | |
655 | 0 | _aElectronic books. | |
695 | _aArrays | ||
695 | _aAssembly | ||
695 | _aBuilt-in self-test | ||
695 | _aCMOS integrated circuits | ||
695 | _aCMOS technology | ||
695 | _aCapacitors | ||
695 | _aCeramics | ||
695 | _aCircuit faults | ||
695 | _aClocks | ||
695 | _aComplexity theory | ||
695 | _aContamination | ||
695 | _aCosmic rays | ||
695 | _aDecoding | ||
695 | _aDielectrics | ||
695 | _aEPROM | ||
695 | _aEarth | ||
695 | _aElectron traps | ||
695 | _aElectronics packaging | ||
695 | _aFerroelectric films | ||
695 | _aFilms | ||
695 | _aIndexes | ||
695 | _aIntegrated circuit modeling | ||
695 | _aIons | ||
695 | _aLatches | ||
695 | _aLead | ||
695 | _aLogic gates | ||
695 | _aMOS devices | ||
695 | _aMaterials | ||
695 | _aNonvolatile memory | ||
695 | _aOrbits | ||
695 | _aPackaging | ||
695 | _aPassivation | ||
695 | _aProgramming | ||
695 | _aProtons | ||
695 | _aRandom access memory | ||
695 | _aRegisters | ||
695 | _aReliability | ||
695 | _aSatellites | ||
695 | _aShift registers | ||
695 | _aStress | ||
695 | _aSubstrates | ||
695 | _aTesting | ||
695 | _aTransistors | ||
710 | 2 |
_aJohn Wiley & Sons, _epublisher. |
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710 | 2 | _aIEEE Solid-State Circuits Council. | |
710 | 2 |
_aIEEE Xplore (Online service), _edistributor. |
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776 | 0 | 8 |
_iPrint version: _z9780780310001 |
856 | 4 | 2 |
_3Abstract with links to resource _uhttp://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=5264189 |
942 | _cEBK | ||
999 |
_c59459 _d59459 |