000 03265nam a22005055i 4500
001 978-3-319-03659-5
003 DE-He213
005 20200421112228.0
007 cr nn 008mamaa
008 131217s2014 gw | s |||| 0|eng d
020 _a9783319036595
_9978-3-319-03659-5
024 7 _a10.1007/978-3-319-03659-5
_2doi
050 4 _aTK7888.4
072 7 _aTJFC
_2bicssc
072 7 _aTEC008010
_2bisacsh
082 0 4 _a621.3815
_223
100 1 _aBrandonisio, Francesco.
_eauthor.
245 1 0 _aNoise-Shaping All-Digital Phase-Locked Loops
_h[electronic resource] :
_bModeling, Simulation, Analysis and Design /
_cby Francesco Brandonisio, Michael Peter Kennedy.
264 1 _aCham :
_bSpringer International Publishing :
_bImprint: Springer,
_c2014.
300 _aXIII, 177 p. 145 illus., 79 illus. in color.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aAnalog Circuits and Signal Processing,
_x1872-082X
505 0 _aIntroduction -- Phase Digitization in All-Digital PLLs -- A Unifying Framework for TDC Architectures -- Analytical Predictions of Phase Noise in ADPLLs -- Advantages of Noise Shaping and Dither -- Efficient Modeling and Simulation of Accumulator-Based ADPLLs -- Modelling and Estimating Phase Noise with Matlab.
520 _aThis book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustrate how to analyze and simulate phase noise in the presence of sigma-delta modulation and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book.   • Discusses in detail a wide range of all-digital phase-locked loops architectures; • Presents a unified framework in which to model time-to-digital converters for ADPLLs; • Explains a procedure to predict and simulate phase noise in oscillators and ADPLLs; • Describes an efficient approach to model ADPLLS; • Includes Matlab code to reproduce the examples in the book.
650 0 _aEngineering.
650 0 _aElectronics.
650 0 _aMicroelectronics.
650 0 _aElectronic circuits.
650 1 4 _aEngineering.
650 2 4 _aCircuits and Systems.
650 2 4 _aSignal, Image and Speech Processing.
650 2 4 _aElectronics and Microelectronics, Instrumentation.
700 1 _aKennedy, Michael Peter.
_eauthor.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9783319036588
830 0 _aAnalog Circuits and Signal Processing,
_x1872-082X
856 4 0 _uhttp://dx.doi.org/10.1007/978-3-319-03659-5
912 _aZDB-2-ENG
942 _cEBK
999 _c57818
_d57818