000 03231nam a22005415i 4500
001 978-3-642-34543-2
003 DE-He213
005 20200421112044.0
007 cr nn 008mamaa
008 121216s2013 gw | s |||| 0|eng d
020 _a9783642345432
_9978-3-642-34543-2
024 7 _a10.1007/978-3-642-34543-2
_2doi
050 4 _aTK5102.9
050 4 _aTA1637-1638
050 4 _aTK7882.S65
072 7 _aTTBM
_2bicssc
072 7 _aUYS
_2bicssc
072 7 _aTEC008000
_2bisacsh
072 7 _aCOM073000
_2bisacsh
082 0 4 _a621.382
_223
100 1 _aGaggl, Richard.
_eauthor.
245 1 0 _aDelta-Sigma A/D-Converters
_h[electronic resource] :
_bPractical Design for Communication Systems /
_cby Richard Gaggl.
264 1 _aBerlin, Heidelberg :
_bSpringer Berlin Heidelberg :
_bImprint: Springer,
_c2013.
300 _aXVIII, 146 p.
_bonline resource.
336 _atext
_btxt
_2rdacontent
337 _acomputer
_bc
_2rdamedia
338 _aonline resource
_bcr
_2rdacarrier
347 _atext file
_bPDF
_2rda
490 1 _aSpringer Series in Advanced Microelectronics,
_x1437-0387 ;
_v39
505 0 _aLimitations of Delta-Sigma Converters -- A Delta-Sigma Converter with Dynamic-Biasing Technique -- A feed-forward Delta-Sigma Converter for ADSL -- A Delta-Sigma Converter for WLAN using a TEQ.
520 _aThe emphasis of this book is on practical design aspects for broadband A/D converters for communication systems. The embedded designs are employed for transceivers in the field of ADSL solutions and WLAN applications. An area- and power-efficient realization of a converter is mandatory to remain competitive in the market. The right choice for the converter topology and architecture needs to be done very carefully to result in a competitive FOM. The book begins with a brief overview of basic concepts about ADSL and WLAN to understand the ADC requirements. At architectural level, issues on different modulator topologies are discussed employing the provided technology node. The design issues are pointed out in detail for modern digital CMOS technologies, beginning with 180nm followed by 130nm and going down to 65nm feature size. Beside practical aspects, challenges to mixed-signal design level are addressed to optimize the converters in terms of consumed chip area, power consumption and design for high yield in volume production. Thus, careful considerations on circuit- and architectural- level are performed by introducing a dynamic-biasing technique, a feed-forward approach and a resolution in time instead of amplitude resolution.
650 0 _aEngineering.
650 0 _aSemiconductors.
650 0 _aElectronic circuits.
650 1 4 _aEngineering.
650 2 4 _aSignal, Image and Speech Processing.
650 2 4 _aElectronic Circuits and Devices.
650 2 4 _aCircuits and Systems.
650 2 4 _aSemiconductors.
710 2 _aSpringerLink (Online service)
773 0 _tSpringer eBooks
776 0 8 _iPrinted edition:
_z9783642345425
830 0 _aSpringer Series in Advanced Microelectronics,
_x1437-0387 ;
_v39
856 4 0 _uhttp://dx.doi.org/10.1007/978-3-642-34543-2
912 _aZDB-2-ENG
942 _cEBK
999 _c56793
_d56793