000 | 03425nam a22005175i 4500 | ||
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001 | 978-1-4614-8800-2 | ||
003 | DE-He213 | ||
005 | 20200421112038.0 | ||
007 | cr nn 008mamaa | ||
008 | 131108s2014 xxu| s |||| 0|eng d | ||
020 |
_a9781461488002 _9978-1-4614-8800-2 |
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024 | 7 |
_a10.1007/978-1-4614-8800-2 _2doi |
|
050 | 4 | _aTK7888.4 | |
072 | 7 |
_aTJFC _2bicssc |
|
072 | 7 |
_aTEC008010 _2bisacsh |
|
082 | 0 | 4 |
_a621.3815 _223 |
245 | 1 | 0 |
_aSmart Multicore Embedded Systems _h[electronic resource] / _cedited by Massimo Torquati, Koen Bertels, Sven Karlsson, Fran�cois Pacull. |
264 | 1 |
_aNew York, NY : _bSpringer New York : _bImprint: Springer, _c2014. |
|
300 |
_aXXVI, 175 p. 77 illus., 54 illus. in color. _bonline resource. |
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336 |
_atext _btxt _2rdacontent |
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337 |
_acomputer _bc _2rdamedia |
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338 |
_aonline resource _bcr _2rdacarrier |
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347 |
_atext file _bPDF _2rda |
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505 | 0 | _aIntroduction -- Part I Parallel Programming Models and Methodologies -- Parallel Programming Models -- Compilation Tool Chains and Intermediate Representations -- Part II HW/SW Architectures Concepts -- The STHORM Platform -- The Architecture and the Technology Characterization of an FPGA-based Customizable Application-Specific Vector Co-Processor (ASVP) -- Part III Run-time and Faults Management -- Fault Tolerance -- Introduction to Dynamic Code Generation -- an Experiment with Matrix Multiplication for STHORM Platform -- Part IV Case Studies -- Signal Processing: Radar -- Image Processing: Object Recognition -- Video Processing: Foreground Recognition in the ASVP platform. | |
520 | _aThis book provides a single-source reference to the state-of-the-art of high-level programming models and compilation tool-chains for embedded system platforms. The authors address challenges faced by programmers developing software to implement parallel applications in embedded systems, where very often they are forced to rewrite sequential programs into parallel software, taking into account all the low level features and peculiarities of the underlying platforms. Readers will benefit from these authors' approach, which takes into account both the application requirements and the platform specificities of various embedded systems from different industries. Parallel programming tool-chains are described that take as input parameters both the application and the platform model, then determine relevant transformations and mapping decisions on the concrete platform, minimizing user intervention and hiding the difficulties related to the correct and efficient use of memory hierarchy and low level code generation. | ||
650 | 0 | _aEngineering. | |
650 | 0 | _aMicroprocessors. | |
650 | 0 | _aElectronics. | |
650 | 0 | _aMicroelectronics. | |
650 | 0 | _aElectronic circuits. | |
650 | 1 | 4 | _aEngineering. |
650 | 2 | 4 | _aCircuits and Systems. |
650 | 2 | 4 | _aProcessor Architectures. |
650 | 2 | 4 | _aElectronics and Microelectronics, Instrumentation. |
700 | 1 |
_aTorquati, Massimo. _eeditor. |
|
700 | 1 |
_aBertels, Koen. _eeditor. |
|
700 | 1 |
_aKarlsson, Sven. _eeditor. |
|
700 | 1 |
_aPacull, Fran�cois. _eeditor. |
|
710 | 2 | _aSpringerLink (Online service) | |
773 | 0 | _tSpringer eBooks | |
776 | 0 | 8 |
_iPrinted edition: _z9781461487999 |
856 | 4 | 0 | _uhttp://dx.doi.org/10.1007/978-1-4614-8800-2 |
912 | _aZDB-2-ENG | ||
942 | _cEBK | ||
999 |
_c56487 _d56487 |