Asynchronous Sequential Machine Design and Analysis (Record no. 84669)
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| 000 -LEADER | |
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| fixed length control field | 05404nam a22005535i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-3-031-79788-0 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20240730163505.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 220601s2009 sz | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9783031797880 |
| -- | 978-3-031-79788-0 |
| 082 04 - CLASSIFICATION NUMBER | |
| Call Number | 620 |
| 100 1# - AUTHOR NAME | |
| Author | Tinder, Richard. |
| 245 10 - TITLE STATEMENT | |
| Title | Asynchronous Sequential Machine Design and Analysis |
| Sub Title | A Comprehensive Development of the Design and Analysis of Clock-Independent State Machines and Systems / |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 1st ed. 2009. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | XV, 235 p. |
| 490 1# - SERIES STATEMENT | |
| Series statement | Synthesis Lectures on Digital Circuits & Systems, |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Remark 2 | I: Background Fundamentals for Design and Analysis of Asynchronous State Machines -- Introduction and Background -- Simple FSM Design and Initialization -- Detection and Elimination of Timing Defects in Asynchronous FSMs -- Design of Single Transition Time Machines -- Design of One-Hot Asynchronous FSMs -- Design of Pulse Mode FSMs -- Analysis of Asynchronous FSMs -- II: Self-Timed Systems/ Programmable Sequencers, and Arbiters -- Externally Asynchronous/Internally Clocked Systems -- Cascadable Asynchronous Programmable Sequencers (CAPS) and Time-Shared System Design -- Asynchronous One-Hot Programmable Sequencer Systems -- Arbiter Modules. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | Asynchronous Sequential Machine Design and Analysis provides a lucid, in-depth treatment of asynchronous state machine design and analysis presented in two parts: Part I on the background fundamentals related to asynchronous sequential logic circuits generally, and Part II on self-timed systems, high-performance asynchronous programmable sequencers, and arbiters. Part I provides a detailed review of the background fundamentals for the design and analysis of asynchronous finite state machines (FSMs). Included are the basic models, use of fully documented state diagrams, and the design and characteristics of basic memory cells and Muller C-elements. Simple FSMs using C-elements illustrate the design process. The detection and elimination of timing defects in asynchronous FSMs are covered in detail. This is followed by the array algebraic approach to the design of single-transition-time machines and use of CAD software for that purpose, one-hot asynchronous FSMs, and pulse mode FSMs. Part I concludes with the analysis procedures for asynchronous state machines. Part II is concerned mainly with self-timed systems, programmable sequencers, and arbiters. It begins with a detailed treatment of externally asynchronous/internally clocked (or pausable) systems that are delay-insensitive and metastability-hardened. This is followed by defect-free cascadable asynchronous sequencers, and defect-free one-hot asynchronous programmable sequencers--their characteristics, design, and applications. Part II concludes with arbiter modules of various types, those with and without metastability protection, together with applications. Presented in the appendices are brief reviews covering mixed-logic gate symbology, Boolean algebra, and entered-variable K-map minimization. End-of-chapter problems and a glossary of terms, expressions, and abbreviations contribute to the reader's learningexperience. Five productivity tools are made available specifically for use with this text and briefly discussed in the Preface. Table of Contents: I: Background Fundamentals for Design and Analysis of Asynchronous State Machines / Introduction and Background / Simple FSM Design and Initialization / Detection and Elimination of Timing Defects in Asynchronous FSMs / Design of Single Transition Time Machines / Design of One-Hot Asynchronous FSMs / Design of Pulse Mode FSMs / Analysis of Asynchronous FSMs / II: Self-Timed Systems/ Programmable Sequencers, and Arbiters / Externally Asynchronous/Internally Clocked Systems / Cascadable Asynchronous Programmable Sequencers (CAPS) and Time-Shared System Design / Asynchronous One-Hot Programmable Sequencer Systems / Arbiter Modules. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | https://doi.org/10.1007/978-3-031-79788-0 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks |
| 264 #1 - | |
| -- | Cham : |
| -- | Springer International Publishing : |
| -- | Imprint: Springer, |
| -- | 2009. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
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| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
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| 347 ## - | |
| -- | text file |
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| -- | rda |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Engineering. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic circuits. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Control engineering. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Robotics. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Automation. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computers. |
| 650 14 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Technology and Engineering. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic Circuits and Systems. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Control, Robotics, Automation. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer Hardware. |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE | |
| -- | 1932-3174 |
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| -- | ZDB-2-SXSC |
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