Separation Logic for High-level Synthesis (Record no. 80135)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 03358nam a22005775i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 978-3-319-53222-6 |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20220801221848.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 170227s2017 sz | s |||| 0|eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9783319532226 |
| -- | 978-3-319-53222-6 |
| 082 04 - CLASSIFICATION NUMBER | |
| Call Number | 621.3815 |
| 100 1# - AUTHOR NAME | |
| Author | Winterstein, Felix. |
| 245 10 - TITLE STATEMENT | |
| Title | Separation Logic for High-level Synthesis |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 1st ed. 2017. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | XIX, 132 p. 19 illus., 7 illus. in color. |
| 490 1# - SERIES STATEMENT | |
| Series statement | Springer Theses, Recognizing Outstanding Ph.D. Research, |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Remark 2 | 1. Introduction -- 2. High-level Synthesis of Dynamic Data Structures -- 3. Background -- 4. Heap Partitioning and Parallelisation -- 5. Custom Multi-Cache Architectures -- 6. Conclusion -- Bibliography -- Appendices. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | This book presents novel compiler techniques, which combine a rigorous mathematical framework, novel program analyses and digital hardware design to advance current high-level synthesis tools and extend their scope beyond the industrial ‘state of the art’. Implementing computation on customised digital hardware plays an increasingly important role in the quest for energy-efficient high-performance computing. Field-programmable gate arrays (FPGAs) gain efficiency by encoding the computing task into the chip’s physical circuitry and are gaining rapidly increasing importance in the processor market, especially after recent announcements of large-scale deployments in the data centre. This is driving, more than ever, the demand for higher design entry abstraction levels, such as the automatic circuit synthesis from high-level languages (high-level synthesis). The techniques in this book apply formal reasoning to high-level synthesis in the context of demonstrably practical applications.<. |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | https://doi.org/10.1007/978-3-319-53222-6 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | eBooks |
| 264 #1 - | |
| -- | Cham : |
| -- | Springer International Publishing : |
| -- | Imprint: Springer, |
| -- | 2017. |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 347 ## - | |
| -- | text file |
| -- | |
| -- | rda |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic circuits. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer storage devices. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Memory management (Computer science). |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Logic design. |
| 650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Compilers (Computer programs). |
| 650 14 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Electronic Circuits and Systems. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Computer Memory Structure. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Logic Design. |
| 650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
| -- | Compilers and Interpreters. |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE | |
| -- | 2190-5061 |
| 912 ## - | |
| -- | ZDB-2-ENG |
| 912 ## - | |
| -- | ZDB-2-SXE |
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