Symbolic Parallelization of Nested Loop Programs (Record no. 79457)
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000 -LEADER | |
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fixed length control field | 02979nam a22005535i 4500 |
001 - CONTROL NUMBER | |
control field | 978-3-319-73909-0 |
005 - DATE AND TIME OF LATEST TRANSACTION | |
control field | 20220801221240.0 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
fixed length control field | 180222s2018 sz | s |||| 0|eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
ISBN | 9783319739090 |
-- | 978-3-319-73909-0 |
082 04 - CLASSIFICATION NUMBER | |
Call Number | 621.3815 |
100 1# - AUTHOR NAME | |
Author | Tanase, Alexandru-Petru. |
245 10 - TITLE STATEMENT | |
Title | Symbolic Parallelization of Nested Loop Programs |
250 ## - EDITION STATEMENT | |
Edition statement | 1st ed. 2018. |
300 ## - PHYSICAL DESCRIPTION | |
Number of Pages | XII, 176 p. 33 illus. in color. |
505 0# - FORMATTED CONTENTS NOTE | |
Remark 2 | Introduction -- Fundamentals and Compiler Framework -- Symbolic Parallelization -- Symbolic Multi‐level Parallelization -- On‐demand Fault‐tolerant Loop Processing -- Conclusions. |
520 ## - SUMMARY, ETC. | |
Summary, etc | This book introduces new compilation techniques, using the polyhedron model for the resource-adaptive parallel execution of loop programs on massively parallel processor arrays. The authors show how to compute optimal symbolic assignments and parallel schedules of loop iterations at compile time, for cases where the number of available cores becomes known only at runtime. The compile/runtime symbolic parallelization approach the authors describe reduces significantly the runtime overhead, compared to dynamic or just‐in-time compilation. The new, on‐demand fault‐tolerant loop processing approach described in this book protects loop nests for parallel execution against soft errors. . |
700 1# - AUTHOR 2 | |
Author 2 | Hannig, Frank. |
700 1# - AUTHOR 2 | |
Author 2 | Teich, Jürgen. |
856 40 - ELECTRONIC LOCATION AND ACCESS | |
Uniform Resource Identifier | https://doi.org/10.1007/978-3-319-73909-0 |
942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
Koha item type | eBooks |
264 #1 - | |
-- | Cham : |
-- | Springer International Publishing : |
-- | Imprint: Springer, |
-- | 2018. |
336 ## - | |
-- | text |
-- | txt |
-- | rdacontent |
337 ## - | |
-- | computer |
-- | c |
-- | rdamedia |
338 ## - | |
-- | online resource |
-- | cr |
-- | rdacarrier |
347 ## - | |
-- | text file |
-- | |
-- | rda |
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
-- | Electronic circuits. |
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
-- | Microprocessors. |
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
-- | Computer architecture. |
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
-- | Electronics. |
650 14 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
-- | Electronic Circuits and Systems. |
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
-- | Processor Architectures. |
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1 | |
-- | Electronics and Microelectronics, Instrumentation. |
912 ## - | |
-- | ZDB-2-ENG |
912 ## - | |
-- | ZDB-2-SXE |
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