High Performance Integer Arithmetic Circuit Design on FPGA (Record no. 79088)

000 -LEADER
fixed length control field 04080nam a22005535i 4500
001 - CONTROL NUMBER
control field 978-81-322-2520-1
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20220801220923.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 150706s2016 ii | s |||| 0|eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN 9788132225201
-- 978-81-322-2520-1
082 04 - CLASSIFICATION NUMBER
Call Number 621.3815
100 1# - AUTHOR NAME
Author Palchaudhuri, Ayan.
245 10 - TITLE STATEMENT
Title High Performance Integer Arithmetic Circuit Design on FPGA
Sub Title Architecture, Implementation and Design Automation /
250 ## - EDITION STATEMENT
Edition statement 1st ed. 2016.
300 ## - PHYSICAL DESCRIPTION
Number of Pages XVII, 114 p. 56 illus.
490 1# - SERIES STATEMENT
Series statement Springer Series in Advanced Microelectronics,
505 0# - FORMATTED CONTENTS NOTE
Remark 2 Introduction -- Architecture of Target FPGA Platform -- A Fabric Component based Design Approach for High Performance Integer Arithmetic Circuits -- Architecture of Data path Circuits -- Architecture of Control path Circuits -- Compact FPGA Implementation of Linear Cellular Automata -- Design Automation and Case Studies -- Conclusions and Future Work.
520 ## - SUMMARY, ETC.
Summary, etc This book describes the optimized implementations of several arithmetic datapath, controlpath and pseudorandom sequence generator circuits for realization of high performance arithmetic circuits targeted towards a specific family of the high-end Field Programmable Gate Arrays (FPGAs). It explores regular, modular, cascadable, and bit-sliced architectures of these circuits, by directly instantiating the target FPGA-specific primitives in the HDL. Every proposed architecture is justified with detailed mathematical analyses. Simultaneously, constrained placement of the circuit building blocks is performed, by placing the logically related hardware primitives in close proximity to one another by supplying relevant placement constraints in the Xilinx proprietary “User Constraints File”. The book covers the implementation of a GUI-based CAD tool named FlexiCore integrated with the Xilinx Integrated Software Environment (ISE) for design automation of platform-specific high-performance arithmetic circuits from user-level specifications. This tool has been used to implement the proposed circuits, as well as hardware implementations of integer arithmetic algorithms where several of the proposed circuits are used as building blocks. Implementation results demonstrate higher performance and superior operand-width scalability for the proposed circuits, with respect to implementations derived through other existing approaches. This book will prove useful to researchers, students, and professionals engaged in the domain of FPGA circuit optimization and implementation.
700 1# - AUTHOR 2
Author 2 Chakraborty, Rajat Subhra.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier https://doi.org/10.1007/978-81-322-2520-1
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type eBooks
264 #1 -
-- New Delhi :
-- Springer India :
-- Imprint: Springer,
-- 2016.
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-- text
-- txt
-- rdacontent
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-- computer
-- c
-- rdamedia
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-- online resource
-- cr
-- rdacarrier
347 ## -
-- text file
-- PDF
-- rda
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic circuits.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronics.
650 #0 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Logic design.
650 14 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronic Circuits and Systems.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Electronics and Microelectronics, Instrumentation.
650 24 - SUBJECT ADDED ENTRY--SUBJECT 1
-- Logic Design.
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
-- 2197-6643 ;
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-- ZDB-2-ENG
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-- ZDB-2-SXE

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