Evolving OpenMP for Evolving Architectures 14th International Workshop on OpenMP, IWOMP 2018, Barcelona, Spain, September 26-28, 2018, Proceedings / [electronic resource] :
edited by Bronis R. de Supinski, Pedro Valero-Lara, Xavier Martorell, Sergi Mateo Bellido, Jesus Labarta.
- 1st ed. 2018.
- X, 253 p. 103 illus. online resource.
- Programming and Software Engineering, 11128 2945-9168 ; .
- Programming and Software Engineering, 11128 .
Best Paper -- The Impact of Taskyield on the Design of Tasks Communicating through MPI -- Loops and OpenMP -- OpenMP Loop Scheduling Revisited: Making a Case for More Schedules -- A Proposal for Loop-Transformation Pragmas -- Extending OpenMP to Facilitate Loop Optimization -- OpenMP in Heterogeneous Systems -- Manage OpenMP GPU Data Environment under Unified Address Space -- OpenMP 4.5 Validation and Verification Suite for Device Offload -- Trade-o_ of offloading to FPGA in OpenMP Task-based programming -- OpenMP Improvements and Innovations -- Compiler Optimizations For OpenMP -- Supporting Function Variants in OpenMP -- Towards an OpenMP Specification for Critical Real-time Systems -- OpenMP User Experiences: Applications and Tools -- Performance Tuning to Close Ninja Gap for Accelerator Physics Emulation System (APES) on Intel Xeon Phi Processors -- Visualization of OpenMP Task Dependencies using Intel Advisor Flow Graph Analyzer -- A Semantics-Driven Approach to Improving DataRaceBench's OpenMPStandard Coverage -- Tasking Evaluations -- On the Impact of OpenMP Task Granularity -- Mapping OpenMP to a Distributed Tasking Runtime -- Assessing Task-to-Data Affinity in the LLVM OpenMP Runtime.
This book constitutes the proceedings of the 14th International Workshop on Open MP, IWOMP 2018, held in Barcelona, Spain, in September 2018. The 16 full papers presented in this volume were carefully reviewed and selected for inclusion in this book. The papers are organized in topical sections named: best paper; loops and OpenMP; OpenMP in heterogeneous systems; OpenMP improvements and innovations; OpenMP user experiences: applications and tools; and tasking evaluations.
9783319985213
10.1007/978-3-319-98521-3 doi
Microprocessors.
Computer architecture.
Software engineering.
Logic design.
Computer science.
Processor Architectures.
Software Engineering.
Logic Design.
Models of Computation.
TK7895.M5 QA76.9.A73
004.22
Best Paper -- The Impact of Taskyield on the Design of Tasks Communicating through MPI -- Loops and OpenMP -- OpenMP Loop Scheduling Revisited: Making a Case for More Schedules -- A Proposal for Loop-Transformation Pragmas -- Extending OpenMP to Facilitate Loop Optimization -- OpenMP in Heterogeneous Systems -- Manage OpenMP GPU Data Environment under Unified Address Space -- OpenMP 4.5 Validation and Verification Suite for Device Offload -- Trade-o_ of offloading to FPGA in OpenMP Task-based programming -- OpenMP Improvements and Innovations -- Compiler Optimizations For OpenMP -- Supporting Function Variants in OpenMP -- Towards an OpenMP Specification for Critical Real-time Systems -- OpenMP User Experiences: Applications and Tools -- Performance Tuning to Close Ninja Gap for Accelerator Physics Emulation System (APES) on Intel Xeon Phi Processors -- Visualization of OpenMP Task Dependencies using Intel Advisor Flow Graph Analyzer -- A Semantics-Driven Approach to Improving DataRaceBench's OpenMPStandard Coverage -- Tasking Evaluations -- On the Impact of OpenMP Task Granularity -- Mapping OpenMP to a Distributed Tasking Runtime -- Assessing Task-to-Data Affinity in the LLVM OpenMP Runtime.
This book constitutes the proceedings of the 14th International Workshop on Open MP, IWOMP 2018, held in Barcelona, Spain, in September 2018. The 16 full papers presented in this volume were carefully reviewed and selected for inclusion in this book. The papers are organized in topical sections named: best paper; loops and OpenMP; OpenMP in heterogeneous systems; OpenMP improvements and innovations; OpenMP user experiences: applications and tools; and tasking evaluations.
9783319985213
10.1007/978-3-319-98521-3 doi
Microprocessors.
Computer architecture.
Software engineering.
Logic design.
Computer science.
Processor Architectures.
Software Engineering.
Logic Design.
Models of Computation.
TK7895.M5 QA76.9.A73
004.22